Semiconductor components are employed in many types of devices to perform a wide variety of applications. An important type of semiconductor component used in many devices is the capacitor. Though there are many types of capacitors, a typical capacitor structure comprises two plates, or electrodes, separated by a dielectric material. The capacitor stores a charge that can represent data. The capacitor can be used to provide isolation between electronic devices and can perform many other functions. In certain high demand technologies such as radio frequency (“RF”), mixed signal and dynamic random access memory (“DRAM”), the choice of capacitor can have a significant impact on system performance and cost.
A capacitor can be formed as an integral part of a semiconductor device, such as a trench capacitor disposed within a DRAM memory cell. A capacitor can be formed at various stages in the semiconductor chip fabrication process. For example, a capacitor can be formed during or after fabrication of interconnections between a semiconductor device and other areas of the chip. Processes performed before the fabrication of interconnections are commonly known as front end of line (“FEOL”) processes. Processes performed during or after the fabrication of interconnections are referred to as back end of line (“BEOL”) processes.
Semiconductor components, including capacitors, can be patterned using lithographic processes. For instance, after a dielectric material is deposited on a semiconductor substrate, a photolithographically formed masking layer having a desired pattern may be used to form one or more recesses in the dielectric material, wherein the masking layer exposes some areas of the dielectric material and leaves other areas of the dielectric material covered. Then, an etching process may remove exposed portions of the dielectric material. A layer of conductive or semiconductive material can be deposited in the recessed areas of the dielectric material. The steps of etching and depositing new material can be repeated until the desired component is formed.
A metal-insulator-metal capacitor (“MIMCAP”) is a type of capacitor fabricated by a lithographic BEOL process. The MIMCAP includes metal layers that form the capacitor plates and an insulator that comprises the dielectric. MIMCAPs typically employ insulators such as silicon dioxide (SiO2) or a nitride. Such materials may be used to form a capacitor with an area capacitance greater than 0.7 fF/μm2 (femto Farads per square micron). A MIMCAP can be fabricated with a lithographic process that employs one or more masking layers. Each masking layer requires multiple steps, such as applying and patterning the masking layer, etching areas exposed by the patterned masking layer, removing any remaining masking layer and cleaning if necessary. Each masking layer must also be properly aligned to a prior masking layer. Thus, each additional step in the lithographic process increases the time and expense of fabricating the devices. In technologies employing copper-based interconnections, for example, most MIMCAPs require at least two masking layers to satisfy “qualification criteria,” such as operating temperature, operating voltage and device lifetime.
Another type of capacitor that can be fabricated with a BEOL process is a vertical sandwich capacitor. FIG. 7 illustrates a cross-sectional view of a conventional vertical sandwich capacitor 300. The capacitor 300 is formed with metal layers and via layers in an interlevel dielectric (“ILD”), which may be fabricated in or on top of a base or substrate 301 of a semiconductor chip. As shown in FIG. 7, four metal layers and three via layers are employed, wherein the metal layers are substantially parallel to the plane of the substrate. Specifically, a first electrode 330 includes a first metal 304, a second metal 312, and a third metal 320 connected by a first via 308 and a second via 316. A second electrode 332 includes a first metal 306, a second metal 314, a third metal 322 and a fourth metal 326 separated by a first via 310, a second via 318 and a third via 324. An effective capacitance 340 is illustrated between the fourth metal 326 of the second electrode 332 and the third metal 320 of the first electrode 330. The vertical sandwich capacitor of FIG. 7 can be fabricated without additional masking steps. However, such capacitors typically require at least three metal layers as well as a relatively low area capacitance on the order of about 0.2 fF/μm2. The vertical sandwich capacitor can be expensive because the relatively low area capacitance necessitates using a large area on the chip to form the capacitor, as well as at least three or more metal layers. Therefore, a need exists for a capacitor that can be fabricated as part of a BEOL process with a minimum of additional processes while providing a desired area capacitance.